CPLD/FPGA DESIGN EXPERIMENTAL KIT

Detailed Product Description
Use the software development environment provided by CPLD/FPGA in studying latest logic design, substitute the complicated hardware design of TTL/CMOS Capable to use circuit graphic and digital hardware descriptive syntax (VHDL/AHDL) to develop circuit. CPLD/FPGA provides free setting of pin, thus no hardware connection is required in case of test experience, save a lot of time for connection soldering, learn hardware operation promptly. Every I/O pin of CPLD/FPGA has logic status monitor, in order to facilitate speed understanding of each pin status. Clearly indicate the location of each pin, easy to visual and measure. Use print out to down load directly from manufacturer development system. Burn in CPLD/FPGA program into EPROM, the experimental device can operate stand-alone. Capable to perform 8051 and CPLD/FPGA match circuit test. Applicable for WIN95/98/NT, a series of item and document CAI, advance gradually, easy to understand and learn.